preliminary data sheet TDA21101 page 1 2002-03-28 fast rise and fall times for frequencies up to 2 mhz capable of sinking and sourcing of more than 4 a peak current for lowest switching losses charges high side (internally clamped to 10 v) and low side mosfets gates up to 12 v for lowest on-losses adjustable high side mosfet gate drive voltage via high impedance pvcc pin for optimizing on losses, gate drive losses, and switching losses integrates the bootstrap diode for reducing the part count prevents from cross-conducting by adaptive gate drive control protects the driver against over-temperature supports shut-down mode for very low quiescent current through three-state input compatible to standard pwm controller ics floating high side mosfet drive up to 30 v operates with v pvcc = 5 to 12 v 10 % requires no separate supply voltage 1:1 compatible to hip6601a and hip6601b ideal for multi-phase desktop cpu supplies on motherboards and vrms and notebook cpu supplies type package marking ordering code TDA21101 p-dso-8 21101g q67042-s4170-a101 gate hs 1 8 phase boot 2 7 p vcc pwm 3 6 v cc gnd 4 5 gate ls p-dso-8 high speed driver with bootstrapping for dual power mosfets features number name description 1 gate hs gate drive output for the n-channel high side mosfet 2 boot floating bootstrap pin. to be connected to the external bootstrap capacitor to generate the gate drive voltage for the high side n-channel mosfet 3 pwm input for the pwm controller signal 4 gnd ground 5 gate ls gate drive output for the n-channel low side mosfet 6 vcc supply voltage 7 pvcc high impedance input to adjust the high side gate drive 8 phase this pin connects to the junction of the high side and the low side mosfet top view pinout
preliminary data sheet TDA21101 page 2 2002-03-28 general description the dual high speed driver is designed to drive a wide range of n-channel low side and n-channel high side mosfets with varying gate charges. it has a small propagation delay from input to output, short rise and fall times and the same pin configuration to be compatible to hip6601. in addition it provides several protection features as well as a shut down mode for efficiency reasons. the high breakdown voltage makes it suitable for mobile applications. target application the dual high speed driver is designed to work well in half-bridge type circuits where dual n-channel mosfets are utilized. a circuit designer can fully take advantage of the drivers capabilities in high-efficiency, high-density synchronous dc/dc converters that operate at high switching frequencies, e.g. in multi-phase converters for cpu supplies on motherboards and vrms but also in motor drive and class-d amplifier type applications. absolute maximum ratings at tj = 25 c, unless otherwise specified value parameter symbol min. max. unit voltage supplied to ?vcc? pin v vcc -0.3 20 voltage supplied to ?pvcc? pin v pvcc -0.3 20 voltage supplied to ?pwm? pin v pwm -0.3 6.5 voltage supplied to ?boot? pin referenced to ?phase? (clamped by the TDA21101 to 10 v when pvcc > 10 v) v boot ? v phase -0.3 10 voltage rating at ?phase? pin, dc v phase -15 30 v junction temperature t j 150 storage temperature t s -55 150 c esd rating; human body model 4 kv iec climatic category; din en 60068-1 55/150/56 - thermal characteristic values parameter symbol min. typ. max. unit thermal resistance, junction-soldering point 90 thermal resistance, junction-ambient 125 k/w
preliminary data sheet TDA21101 page 3 2002-03-28 electrical characteristic at tj = 25 c, unless otherwise specified values parameter symbol conditions min. typ. max. unit supply characteristic bias supply current i vcc f = 250 khz, v pvcc = v vcc = 12 v 9.0 12 ma quiescent current i vccq 1.8 v v pwm 3.0 v 4.5 ma power supply current i pvcc 0.1 f 2 mhz, 5 v v pvcc 12 v -500 500 na under-voltage lockout v vcc rising threshold 9.0 9.5 10 v under-voltage lockout v vcc falling threshold 8.15 8.8 9.15 v input characteristic current in ?pwm? pin i pwm_l v _pwm = 0.4 v -120 current in ?pwm? pin i pwm_h v _pwm = 4.5 v 180 a shut down window v in_shut t_ shut > 600 ns 1.8 3.0 v shut down hold-off time t_ shut 1.8 v v pwm 3.0 v 320 450 600 ns pwm pin open * v pwm_o 1.8 2.0 2.2 pwm low level threshold v pwm_l 1.2 2.5 pwm high level threshold v pwm_h 2.5 3.9 v * the driver ic will shut down and the high side mosfet and the low side mosfet will be turned- off when the pwm input is open (e.g. pwm input disconnected or the pwm ic in a high-z state) at tj = 25 c, unless otherwise specified dynamic characteristic turn-on propagation delay high side t d(on)_hs 58 70 turn-off propagation delay high side t d(off)_hs 40 50 rise time high side t r_hs 18 34 fall time high side t f_hs 18 30 turn-on propagation delay low side t d(on)_ls 40 60 turn-off propagation delay low side t d(off)_ls 30 40 rise time low side t r_ls 19 32 fall time low side t f_ls p pvcc = v vcc = 12 v c iss = 3000 pf 17 25 ns turn-on propagation delay high side t d(on)_hs 80 turn-off propagation delay high side t d(off)_hs 60 rise time high side t r_hs 18 fall time high side t f_hs 21 turn-on propagation delay low side t d(on)_ls p pvcc = v vcc = 12 v c iss = 3000 pf t j = 125 c 50 ns
preliminary data sheet TDA21101 page 4 2002-03-28 turn-off propagation delay low side t d(off)_ls 43 rise time low side t r_ls 21 fall time low side t f_ls 20 operating conditions at tj = 25 c, unless otherwise specified values parameter symbol conditions min. typ. max. unit voltage supplied to ?vcc? pins v vcc 10.8 13.2 v voltage supplied to ?pvcc? pins v pvcc 5 13.2 v input signal transition frequency f 0.1 2 mhz power dissipation p tot t a = 25 c, t j = 125 c 0.8 w thermal shut down t ot ( hysteresis = 50 c) 135 150 165 c junction temperature t j -25 125 c at tj = 25 c, unless otherwise specified values parameter conditions min. typ. max. unit output characteristic high side (hs) and low side (ls), ensured by design hs; source * p pvcc = v vcc = 12 v i _hs_src = 2 a 2.15 v hs; sink v vcc = 12 v, p pvcc = 5 v 1.2 1.9 hs; sink p pvcc = v vcc = 12 v 0.95 1.5 w ls; source * p pvcc = v vcc = 12 v i _hs_src = 2 a 2.15 v output resistance and voltage drop resp. ls; sink p pvcc = v vcc = 12 v 0.7 1.0 w hs; source * p pvcc = v vcc = 12 v i _hs_src = 2 a, t j = 125 c 1.65 v hs; sink v vcc = 12 v, p pvcc = 5 v t j = 125 c 1.9 hs; sink p pvcc = v vcc = 12 v t j = 125 c 1.5 w ls; source * p pvcc = v vcc = 12 v i _hs_src = 2 a, t j = 125 c 1.65 v output resistance and voltage drop resp. (@ 125 c) ls; sink p pvcc = v vcc = 12 v t j = 125 c 1.1 w hs; source * 4 hs; sink 4 ls; source * 4 peak output- current ls; sink p pvcc = v vcc = 12 v d < 3 % t_ p / pulse < 30 ns 4 a * the sourcing outputs of the ls and the hs terminals are bipolar and mos transistors in parallel. the voltage drop is the voltage drop across the bipolar and mos transistor combination; the peak output current is the combined output current the driver can deliver.
preliminary data sheet TDA21101 page 5 2002-03-28 published by infineon technologies ag, bereichs kommunikation st.-martin- strasse 53, d-81541 mnchen infineon technologies ag 1999 all rights reserved. attention please! the information herein is given to describe certain components and shall not be considered as warranted characteristics. terms of delivery and rights to technical change reserved. we hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. infineon technologies is an approved cecc manufacturer. information for further information on technology, delivery terms and conditions and prices please contact your nearest infineon technologies office in germany or our infineon technologies representatives worldwide (see address list). warnings due to technical requirements components may contain dangerous substances. for information on the types in question please contact your nearest infineon technologies office. infineon technologies components may only be used in life-support devices or systems with the express written approval of infineon technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device or system, or to affect the safety or effectiveness of that device or system life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. if they fail, it is reasonable to assume that the health of the user or other persons may be endangered.
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